1. Field of the Invention
The present invention is generally in the field of transistors. More specifically, the present invention is in the field of trench-based field-effect transistors.
2. Background Art
Power semiconductor devices, such as trench field-effect transistors (trench FETs), are widely used in a variety of electronic devices and systems. Examples of such electronic devices and systems are power converters, such as DC to DC converters, in which vertically conducting trench type silicon FETs, for instance, may be implemented as power switches. In power converters, power losses within the power switches, as well as factors affecting switching speed, are becoming increasingly important. For example, for optimal performance, it is desirable to reduce overall gate charge Qg, gate resistance Rg, and ON-resistance Rdson the power switches.
However, designing trench FETs to optimize performance for particular applications often involves tradeoffs, where improving one performance parameter degrades another. For example, reducing trench dimensions in a substrate can improve gate charge Qg and ON-resistance Rdson at the expense of increased gate resistance Rg. More particularly, reducing trench dimensions can also reduce the effective conductive area of a gate electrode in the trench, thereby increasing gate resistance Rg. Thus, conventional trench FETs can be limited by trench dimensions in order to achieve acceptable overall performance. As such, it would be desirable to provide trench FETs which can have relatively improved gate resistance Rg, while achieving other performance parameters.
Thus, there is a need for trench FETs that can overcome the drawbacks and deficiencies in the art and a method for fabricating the same.